While there are many methods for depositing material in VLSI and ULSI technology, these methods maybe broadly classified into chemical vapor deposition (CVD) and physical vapor deposition (PVD). CVD is defined as the formation of a nonvolatile solid film on a substrate by the reaction of vapor phase reactants that contain the required chemical constituents of the solid film. The most common CVD deposition methods are atmospheric pressure CVD (APCVD), low pressure CVD (LPCVD), and plasma enhanced CVD (PECVD). PECVD is a preferred method where lower temperatures are required.
The CVD process includes, among other reaction steps, transport of the reactants to the surface of the substrate and reaction at the substrate surface. Depending on process parameters such as temperature and pressure, the deposition rate is primarily affected by parameters that affect the slowest reaction step and is frequently classified as either reaction limited or mass transport limited. However, even if the deposition rate is reaction limited, the surface reaction rate is affected by local non uniformities in gas phase reactant concentrations resulting in depletion non-uniformities and consequently film non-uniformities. On the other hand, if the deposition rate is mass-transport limited, it is crucial that the flux of gas phase reactant to the surface is uniform across the deposition substrate, for example, a semiconductor wafer. Thus, in either case uniformity in gas phase concentrations over the deposition substrate affects film uniformity.
For example, PECVD uses RF power to generate a glow discharge (plasma) thereby ionizing reactant precursors and imparting energy to the reactants allowing the deposition to occur at a lower temperature compared to APCVD or LPCVD depositions. As a result, PECVD depositions are generally reaction limited. Generally, free electrons are generated under the influence of RF energy and are accelerated by an electric field to collide with gas phase molecules thereby creating ions which may in turn be accelerated toward the substrate where they adsorb and rearrange to form a deposited solid film.
As feature geometries shrink, uniform CVD film deposition with fully reacted precursors is increasingly important and more difficult to achieve. In addition, as wafer sizes increase, etch/deposition uniformity has become increasingly harder to achieve in plasma reactors, for example, PECVD or HDP-CVD reactors. Nonuniformity in etching and deposition is typically exhibited across the diameter of process wafer with the greatest differences at the center and at the edges (circumference) of the process wafer. Consequently, semiconductor features exhibit asymmetric dimensions caused by etching or deposition non-uniformities.
Another problem in PECVD depositions is the reaction of incompletely ionized precursor reactants with certain portions of the wafer process surface, thus causing to formation of undesired film products at the surface which adversely affects the mechanical integrity and/or the electrical performance of the device.
According to the prior art, efforts to address deposition uniformity have focused on adjusting the power level of the RF power antenna (excitation source), for example, in an inductively coupled plasma source, a single or dual TCP (transformer coupled plasma), typically disposed outside the reactor chamber adjacent to a dielectric window through which power is transmitted to the reactor gases. In addition, efforts have been made to gain better control of the substrate temperature, for example, by including a dual temperature control on the electrostatic chuck (ESC) that holds the substrate.
It has also been found that the gas transport characteristics within a plasma reactor are a sensitive variable contributing to deposition non-uniformities. Although there have been a variety of gas feed systems proposed for plasma reactors, many of them have unacceptable shortcomings. While, prior art systems are generally effective in delivering, all of these systems exhibit the shortcoming of susceptibility to transient gas flow disruptions caused by a time lag for a flow controller, for example a mass flow controller to adjust to the proper flow delivery rate upon a change in flow delivery rates or precursors. As a result, gas flow transients can cause unacceptable non-uniformities or undesired reactant products at the film surface.
For example, gas feed systems for plasma reactors have included top gas feed arrangement where the gas feed is fed from the top of the reactor chamber toward the substrate surface. Further, arrangements have included, for example, gas feeds centrally located at the top of the chamber including shower head feed arrangements. Further, the prior art has disclosed gas feeds that are centrally located in the upper chamber including one or more gas feeds and which can be directed at a variety of angles generally toward the substrate surface. The gas feeds including the gas feed orifices are typically fine tuned for a particular deposition process creating complex patterns of interfering streams of gas to achieve fully ionized precursors with acceptable uniformity at the wafer process surface. The prior art gas feed systems cannot adequately adjust for transient gas flow disruptions, leading to undesired film non-uniformities and reaction products at the wafer process surface which increasingly adversely affects device performance as critical dimensions are reduced.
There is therefore a need in the semiconductor processing art to develop a gas feed system and method whereby gas transport conditions for a plasma enhanced CVD or etching process may be readily optimized while avoiding precursor gas flow transients.
It is therefore an object of the invention to provide a gas feed system and method whereby gas transport conditions for a plasma enhanced CVD or etching process may be readily optimized while avoiding precursor gas flow transients in addition to overcoming other shortcomings and deficiencies in the prior art.